Development of Architectural Model for Estate Valuation System
Ochonogor Donpaul,
Constance Izuchukwu Amannah
Issue:
Volume 10, Issue 1, June 2021
Pages:
1-9
Received:
21 December 2020
Accepted:
30 December 2020
Published:
22 January 2021
Abstract: Estate valuation is the art, practice and science for the determination of the value of the entire property description and the interest therein. Estate valuers quest for a better method that will bring effectiveness, accuracy and efficiency in their practice. The need to optimize valuation process and method has become a timely contemporary demand. The research was designed to develop architectural model for estate valuation. The study was poised to; identify the traditional method of estate valuation, design a template for estate valuation, implement the estate valuation template, test and deploy the estate valuation template. The study adopted the waterfall model. It breaks down the project activity into linear sequential phases where each phase depended on the deliverable of the existing one and the next one to a specialization of events. The study achieved its aim; architectural model for estate valuation system (AMVS). The AMVS was implemented on the PHP programming platform with MYSQL as database. The system was tested and deployed. The system validity and originality was measured by comparing its outputs with the direct results of a professional valuer over the same estate property and disparity in results was negliablly minimal. The system is recommended for use by users with basic knowledge of computer operation and doing so with recommended data categories as indicated in the documentation as related to the estate valuation practice, alongside the use of recommended standard hardware and software specifications should be closely adhered to.
Abstract: Estate valuation is the art, practice and science for the determination of the value of the entire property description and the interest therein. Estate valuers quest for a better method that will bring effectiveness, accuracy and efficiency in their practice. The need to optimize valuation process and method has become a timely contemporary demand...
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Research on Space Motion Trajectory Optimization of the Industrial Robot
Gongxing Chen,
Luxin Tang
Issue:
Volume 10, Issue 1, June 2021
Pages:
10-14
Received:
13 November 2020
Accepted:
18 March 2021
Published:
16 April 2021
Abstract: In this paper, an online iterative learning planning method is proposed for industrial robot joint space manipulator to capture moving objects. The dynamic mathematical model of the robot is established, and the trajectory of the robot manipulator is tracked and adjusted through the path planning algorithm to change the visual impedance of the robot and optimize the system parameters. It makes the velocity direction of the end effector of the manipulator consistent with the tangent direction of the weld, and realizes the tracking and recognition of the weld trajectory at the end of the manipulator, so as to improve the accuracy and reliability of the robot in capturing moving objects. The simulation results show that the algorithm has good convergence and robustness.
Abstract: In this paper, an online iterative learning planning method is proposed for industrial robot joint space manipulator to capture moving objects. The dynamic mathematical model of the robot is established, and the trajectory of the robot manipulator is tracked and adjusted through the path planning algorithm to change the visual impedance of the robo...
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Hardware Implementation of Amplitude Shift Keying and Quadrature Amplitude Modulators Using FPGA
Tchahou Tchendjeu Achille Ecladore,
Tchitnga Robert,
Fotsin Hillarie Bertrand
Issue:
Volume 10, Issue 1, June 2021
Pages:
15-24
Received:
2 May 2021
Accepted:
19 May 2021
Published:
27 May 2021
Abstract: In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM modulators. For us to implement these modulators, a sine function with floating-point operation as per IEEE754 standards is used based on Hardware Description Language technique. When the carrier is generated, the digital message modulates the amplitude of the carrier. To implement the QAM modulator, we need two sinusoidal carriers. A cosine function and a sine function are built to get the two carriers. Alongside to this work, ASK and QAM signal modulators are implemented using 26-bit phase accumulator and Look Up Table to generate the sine and cosine functions, then comparison of speed, occupied area and estimated power consume are done with the proposed modulators. Without using DSP builder tools or an Altera system generator, we implemented the whole systems using VHDL on cyclone IV-E-EP4CE115F29C7N of the board DE2-115. In general, the proposed modulator design present low area and power consummation than modulator using LUT or CORDIC.
Abstract: In our paper, we present the implementation of two kinds of FPGA-based modulators: ASK and QAM signal modulators. The ASK modulators we implemented are OOK, ASK, and 4ASK, then the QAM modulators implemented are 4QAM and 16QAM. The generation of the sine wave carrier is the main task when implementing any digital transmitter including ASK and QAM m...
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