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Adaptive Relay Configuration Based on the Novel Hyperchaotic Three-Components Oscillator Operating at High Frequency: Global Synchronization
B. A. Mezatio,
M. Tingue Motchongom,
R. Kengne,
T. Fozin Fonzin,
A. Tchagna Kouanou,
R. Tchitnga,
A. Fomethe
Issue:
Volume 9, Issue 1, June 2020
Pages:
1-15
Received:
8 October 2019
Accepted:
6 November 2019
Published:
13 April 2020
Abstract: This article is investigating from one of best control technique known as periodically intermittent discrete observation control (PIDOC), the problem of global synchronization based on a relay configuration of three novel hyperchaotic oscillators of three-components (NHO) operating at high frequency. Contrary to traditional periodically intermittent control based on continuous-time state observations, PIDOC used here, chooses discrete-time state observations in work time during a control period. Our analysis has been limited to a range of parameters for which the NHO-type oscillator exhibits bursting oscillations. The global conditions of stability for non-adaptive and adaptive cases have been proven analytically. To the best of our knowledge and in the literature of the relay coupling system, no work has been carried out concerning the study of the stability of adaptive synchronization case. The Synchronization of the system is analysed in terms of its control gain by using time series. The numerical results show that there is global synchronization between the three relay coupled NHO-type oscillators for both non-adaptive and adaptive synchronizations. Moreover, PSpice based simulations of the analog electronic circuit for the non-adaptive case are in good accordance with both theoretical and numerical results.
Abstract: This article is investigating from one of best control technique known as periodically intermittent discrete observation control (PIDOC), the problem of global synchronization based on a relay configuration of three novel hyperchaotic oscillators of three-components (NHO) operating at high frequency. Contrary to traditional periodically intermitten...
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Development of a Model Architecture for Job Scheduling
Eduok Uyuho Isaac,
Amannah Constance Izuchukwu
Issue:
Volume 9, Issue 1, June 2020
Pages:
16-23
Received:
29 March 2020
Accepted:
22 April 2020
Published:
19 May 2020
Abstract: Job scheduling has a long history. Job schedulers have been one of the major component of IT infrastructure since the early mainframe system, at first, stacks of punched cards were processed one after the other, hence the term batch processing. The aim of a job scheduler was to arrange, control and optimize work and workload in a production process. The study aimed at achieving a job scheduler that can assign jobs to available resources in such a way that workload leveling can be achieved. The objectives of the study included to; ascertain the existing schedule system, design a model platform for job scheduling, implement the model platform for job scheduling, and test and deploy the model platform for job scheduling. The study adopted the spiral development model. The proposed system was developed using java script which is a client scripting language which is used for creating web and windows application and it has almost all online application since the system is an online system. The developed application was tested with field Meta data and the outcome was according to specification and of desired output. The application was hosted on three different servers, one server for the frontend, another server for the backend and the third server for the database, hosting on the three different servers did the magic by making the system faster and easy to optimize.
Abstract: Job scheduling has a long history. Job schedulers have been one of the major component of IT infrastructure since the early mainframe system, at first, stacks of punched cards were processed one after the other, hence the term batch processing. The aim of a job scheduler was to arrange, control and optimize work and workload in a production process...
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Use of Virtual Forward Propagation Network Model to Translate Analog Components
Muhammad Sana Ullah,
William Brickner,
Emadelden Fouad
Issue:
Volume 9, Issue 1, June 2020
Pages:
24-30
Received:
1 June 2020
Accepted:
17 June 2020
Published:
17 July 2020
Abstract: Neural computing is an emerging research topic today due to its massive increase in demand and applications for machine learning. In this virtual simulation research work, using a free software, a program has been trained a neural network model and translate its functionality into the hardware. In the context of analog neural network, this research seeks to verify a shift sigmoid function that can approximate the transfer function of CMOS inverter. By showing this approximation accurately and reducing the number of components, it would help to implement the neural network based integrated chips. A conciliation is selected for the distance matric of the proposed function. This distance metric between the given CMOS transfer function and the shifted sigmoid function is minimized using the gradient descent. However, this approximate transfer function of CMOS inverter is chosen to verify in a three-layer perceptron networks. The network topology randomly generates weights to provide a diverse set of truth tables. We report two networks whose weights are chosen randomly using a back propagation algorithm due to volatile nature of the network topology and the activation function. The results of this research conclude that the transfer function of CMOS inverter is able to approximate the CMOS transfer function adequately for the purposes of these perceptron networks.
Abstract: Neural computing is an emerging research topic today due to its massive increase in demand and applications for machine learning. In this virtual simulation research work, using a free software, a program has been trained a neural network model and translate its functionality into the hardware. In the context of analog neural network, this research...
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