A Novel Phonemes Classification Method Using Fuzzy Logic
Ines Ben Fredj,
Kaïs Ouni
Issue:
Volume 2, Issue 1, February 2013
Pages:
1-5
Published:
20 February 2013
Abstract: In this study, we will interest in phonemes classification of Timit database using Fuzzy Logic. The fuzzy method consists in the extraction of a three fuzzy-reference vectors: maximal, mean and minimal. To classify a phoneme request, we calculate its degree of membership to all defined classes. The class of a phoneme request is, then, the one which maximizes one degree of membership calculated according to reference vectors. Different techniques of speech analysis are used for evaluation. Results show that fuzzy logic can provide a significant issue when mathematical rigor is not present as to the signal processing since the retained recognition rates was 90,85%, 22,96%, 98,57% and 91,73% for respectively MFCC, LPC, PLP and RASTA PLP.
Abstract: In this study, we will interest in phonemes classification of Timit database using Fuzzy Logic. The fuzzy method consists in the extraction of a three fuzzy-reference vectors: maximal, mean and minimal. To classify a phoneme request, we calculate its degree of membership to all defined classes. The class of a phoneme request is, then, the one which...
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Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc
Taheni Damak,
Imen Werda,
Mohamed Ali Ben Ayed,
Nouri Masmoudi
Issue:
Volume 2, Issue 1, February 2013
Pages:
6-15
Published:
20 February 2013
Abstract: Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was designed to optimize the first syntax element: the CoeffToken. ZLP implementation reduces CAVLD execution time to 21% instead of 41% from decoding time with a throughput of 1.28 MegaMB/s. In addition, the decoder speed was increased from 36 frames per second (fps) to 44 fps for a CIF compressed bitstream.
Abstract: Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was ...
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Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit
Elham Khamsehashari,
Yves Audet
Issue:
Volume 2, Issue 1, February 2013
Pages:
16-21
Published:
20 February 2013
Abstract: A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems.
Abstract: A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range o...
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