Volume 8, Issue 2, December 2019, Page: 76-81
Performance Improvement of 4-Bit Static CMOS Carry Look-Ahead Adder Using Modified Circuits for Carry Propagate and Generate Terms
Mehedi Hasan, Department of Electrical and Computer Engineering, North South University, Dhaka, Bangladesh; IC Mask Design Department, Ulkasemi Limited, Dhaka, Bangladesh
Moumita Sadia Islam, Department of Electrical and Computer Engineering, North South University, Dhaka, Bangladesh
Muhtasim Rafid Ahmed, IC Mask Design Department, Ulkasemi Limited, Dhaka, Bangladesh
Received: Dec. 2, 2019;       Accepted: Dec. 18, 2019;       Published: Dec. 27, 2019
DOI: 10.11648/j.cssp.20190802.16      View  147      Downloads  74
Abstract
Carry Look-Ahead Adder (CLA) is considered as one of the most widely used adder topologies which are used in high performance computing systems. In this research, an improved version of 4-bit CLA adder has been proposed. Performance improvement of 4-bit CLA adder has been made by using hybrid AND and XOR gates in the input side for generating carry propagate and carry generate terms. The CLA circuits are kept exactly the same as the conventional one. Performance of the proposed modified 4-bit CLA adder has been evaluated and compared with the conventional design using Cadence tools in 90 nm technology node. Performance has been evaluated and compared in terms of average power, propagation delay and power delay product. The proposed modified design exhibited significant improvement in performance while compared with the conventional one. Enhancement done by the proposed 4-bit CLA adder design in average power, propagation delay and PDP were 14.96%, 11.76% and 25.32% respectively. In addition to performance enhancement, transistor count require for the proposed design is quite less compared to the conventional design which result in less surface area on chip. Moreover, less transistor count accounts for less power dissipation. Hence, utilizing the proposed design in modern high-performance computing systems would bring about high-performance improvements.
Keywords
Carry Look-ahead Adder, 4-Bit Adder, Xor Gate, And Gate, Carry-Propagate
To cite this article
Mehedi Hasan, Moumita Sadia Islam, Muhtasim Rafid Ahmed, Performance Improvement of 4-Bit Static CMOS Carry Look-Ahead Adder Using Modified Circuits for Carry Propagate and Generate Terms, Science Journal of Circuits, Systems and Signal Processing. Vol. 8, No. 2, 2019, pp. 76-81. doi: 10.11648/j.cssp.20190802.16
Copyright
Copyright © 2019 Authors retain the copyright of this article.
This article is an open access article distributed under the Creative Commons Attribution License (http://creativecommons.org/licenses/by/4.0/) which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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